|Emberlynn McKinney fa4c5a883a||2 years ago|
|alu||3 years ago|
|asm||3 years ago|
|cpu||3 years ago|
|misc||3 years ago|
|reg||3 years ago|
|tool||2 years ago|
|vga||2 years ago|
|.gitignore||3 years ago|
|LICENSE||3 years ago|
|README.md||3 years ago|
|dep_graph.dot||3 years ago|
|hex7seg.cpp||3 years ago|
|hex7seg.v||3 years ago|
|lab6.do||3 years ago|
|lab6_testbench.v||3 years ago|
I wrote this MIPS CPU as part of CSCE 611 at USC in 2016. We wrote it for the Altera tools, but this gets it to work somewhat with Verilator.
Currently, it can run the final project from that class, but the simulator is extremely slow. To test it with the SDL frontend:
$ git clone https://github.com/NighttimeDriver50000/mips_cpu_611.git $ cd mips_cpu_611 $ ./tool/make.sh $ ./obj_dir/Vmips_cpu_inst_for_sdl
This is probably all I'll do on getting this to run on Verilator, seeing as the simulation is so slow.
The code is MIT licensed, but there are far better MIPS CPUs out there.